A phased-locked loop (PLL) has many industrial applications such as FM demodulators, stereo demodulators, tone detectors, and frequency synthesizers. A PLL performs a capturing process in which the loop goes from an unlocked, or free-running condition, to a locked condition onto the frequency of the input signal when the frequency of the voltage-controlled oscillator is equal to the frequency of the input signal. This capturing process has been implemented with a phase detector that is driven by analog signals and digital square-wave signals.
FIG. 1 (Prior Art) is a block diagram illustrating a phased-locked loop 10 containing a phase detector 12, a loop filter 14, an amplifier 16, a voltage-controlled oscillator (VCO) 18. The phase detector 12 receives a first input at a first frequency, denoted by the symbol f.sub.in, and a second input at a second frequency generated by the VCO, denoted by the symbol f.sub.vco. The second input is also referred to as a feedback signal. The phase detector 12 compares the two input frequencies, f.sub.in and f.sub.vco, and generates an output that represents the phase difference between the two input frequencies. The phase detector 12 can be implemented as a frequency multiplier that multiplies the feedback signal. The loop filter 14 filters the input signal. The amplifier 16 amplifies the filtered signal from the loop filter 14. If there is a phase differential between f.sub.in and f.sub.vco, then the input into the VCO 18 operates as an error signal which will adjust the frequency setting in the voltage-controlled oscillator 18. A signal may travel through several iterations around the loop until the VCO 18 adjusts f.sub.vco to be in synchronization with f.sub.in and f.sub.vco. Upon which time, the VCO 18 voltage-controlled of the PLL 10 recovers and completes the synchronization operations.
For background information on PLL, the reader is referred to Analysis and Design of Analog Integrated Circuits, Second Edition, Paul R. Gray and Robert G. Meyer, 1997, pp. 605-622; The Art of Electronics, Paul Horowitz and Winfield Hill, 1980, pp. 428-437. The content of this document is incorporated herein by reference.
However, as the vast array of technologies converge into a digital world, the traditional PLL that was originally designed with the intention to capture the input frequency with an analog circuit is less compatible with other digital circuits. Accordingly, it is desirable to have a PLL method and system for capturing the frequency of an input signal that is more suitable for coupling with other digital circuits.